Chips - Etching

SLAC National Accelerator Laboratory is operated by Stanford University for the Department of Energy. As a management and operating contractor, subcontracts awarded by the Laboratory are not Federal procurements, and are not directly subject to the Federal Acquisition Regulations in 48 CFR. Nonetheless, certain Federal laws, Executive Orders, and regulations may affect our DOE approved purchasing system, as required by statute, regulation, or contract terms and conditions Sources Sought for the following: Microfluidic cylindrical liquid jet device The cost should include: Setup Costs, Mask for 4" substrate, wafer 90x90mm usable surface, Hydrophobic coating - 30 chips, and laser separation. Spec's DESIGN Amount Masks 5 Chios on one wafer t. b d Total amount of designs To be agreed TOP LAYER Size Tolerance Material Borosilicate glass Thickness 400um +/-40um Channels Etching Depth 1 10um +/-1 um Minim um width 30um Depth 2 10+10um +/-2um Minimum width 50um Holes Powderblasting Large diameter 400um +/- 150um Small diameter 200um +/- 150um BOTTOM LAYER Size Tolerance Material Borosilicate glass Thickness 400um +/- 40um Channels Etching Depth 1 10um +/- 1um Minimum width 30m Depth 2 10+10um +/- 2um Minim um width 50um SEPARATION Size tolerance Chip Width 6m m t b d Chip Length 17mm t b.d Reply to FBO posting only. SLAC National Accelerator Laboratory is operated by Stanford University for the Department of Energy. As a management and operating contractor, subcontracts awarded by the Laboratory are not Federal procurements, and are not directly subject to the Federal Acquisition Regulations in 48 CFR. Nonetheless, certain Federal laws, Executive Orders, and regulations may affect our DOE approved purchasing system, as required by statute, regulation, or contract terms and conditions.